
Test Access Port and Boundary-scan Architecture
出版:Institute of Electrical and Electronics Engineers

专家解读视频
Gives a definition of test logic which can be included as an integrated circuit to provide standardized approaches to testing interconnections between integrated circuits when assembled onto a printed circuit, testing the integrated circuit itself, and observing or modifying circuit activity during the component's normal operation. Coverage includes test logic architecture, the instruction register, test data registers, the bypass register, and the device identification register.
Supersedes IEEE 1149.1B (09/2001) Supersedes IEEE DRAFT 1149.1 (02/2005)